1. Field of the Invention
The present invention relates generally to a differential amplifier, a comparator and a high-speed A/D converter using the same, and more particularly, to an A/D converter having an improved operation speed. The present invention has particular applicability to series-parallel type A/D converters.
2. Description of the Background Art
Conventionally, converters for converting analog signals into digital signals (hereinafter referred to as an A/D converter) have been widely used for digital signal processing of analog signals. The field of video signal processing, for example, requires a high-speed digital signal processing, whereby an A/D converter should operate at a high speed.
Known A/D converters suitable for high-speed conversion are conventional parallel type A/D converter and series-parallel type A/D converter. In both of parallel type and series-parallel type A/D converters, a plurality of analog input signals are applied to inputs of comparators in parallel. In a series-parallel type A/D converter, an analog signal is converted into a digital signal on a time base in a serial manner.
A comparator for use in an A/D converter is generally provided with a differential amplifier. An operation speed of the differential amplifier therefore directly affects a conversion speed of the A/D converter. While the present invention is generally applicable to a differential amplifier and an electronic circuit using the same, an application of the present invention to an A/D converter will be described in the following by way of example.
FIG. 17 is a circuit block diagram of a conventional A/D converter. An equivalent circuit of the A/D converter shown in FIG. 17 is illustrated in "Digest of Technical Papers of ISSCC of 1990" pp. 162-163. With reference to FIG. 17, an A/D converter 900 includes a reference voltage generation circuit 902 for generating a reference voltage, a ladder resistor circuit 901, comparators 908a to 908f and an encoder 4. Complementary or differential analog input signals V1 and V2 are applied to the comparators 908a to 908f through the reference voltage generation circuit 902 and the ladder resistor circuit 901. The reference voltage generation circuit 902 is provided with voltage sources 903 to 906 each for generating a reference voltage V.sub.REF. The ladder resistor circuit 901 has resistors each having a resistance value Rr connected in ladder. A potential difference between the opposite ends of each resistor is represented Vr. The encoder 4 outputs converted digital data D1 to Dm.
FIG. 18 is a diagram illustrating operation of the A/D converter shown in FIG. 17. With reference to FIGS. 17 and 18, the operation will be described in the following. Each of comparators 908a to 908f receives a positive input voltage and a negative input voltage from the ladder resistor circuit 901. For example, the comparator 908a receives a positive input voltage Vap and a negative input voltage Van from the ladder resistor circuit 901. Similarly, the comparator 908b receives a positive input voltage Vbp and a negative input voltage Vbn. FIG. 18 shows a change of an input voltage of each of the comparators 908a to 908f with respect to an analog input voltage V1. In other words, the abscissa shows a change of the analog input voltage V1, while the ordinate shows a change of the input voltage of each of the comparators 908a to 908f.
First, voltages Vcp and Vdp both equal to the input voltage V1, have rising solid lines in FIG. 18. The input voltage V2, complementary (or differential) to the input voltage V1 is shown by a falling solid line having an absolute value equal to that of V1. The voltages Vcn and Vdn are therefore shown by a falling solid line at the center of the diagram.
The voltage Vap becomes higher than the input voltage V1 by V.sub.REF because of the voltage source 903. On the other hand, the voltage Van becomes lower than the input voltage V2 by V.sub.REF because of the voltage source 905. The voltages Vap and Van are therefore shown by a rising solid line and a falling solid line in the diagram, respectively. The voltage Vfp becomes lower than the input voltage V1 by V.sub.REF because of the voltage source 904. The voltage Vfn becomes higher than the input voltage V2 by V.sub.REF because of the voltage source 906. The voltages Vfp and Vfn are therefore shown by a rising solid line and a falling solid line, respectively, in the diagram.
Each of the comparators 908a to 908f compares a received positive input voltage with a received negative input voltage. For example, the comparator 908a compares a voltage Vap with Van. When V1-V2 is equal to -2 V.sub.REF the voltage Yap becomes equal to the voltage Van. The comparator 908a therefore outputs a low level (logical low) signal when V1-V2 is smaller than -2 V.sub.REF, while it outputs a high level (logical high) signal when V1-V2 is larger than -2 V.sub.REF.
The comparator 908b compares voltages Vbp and Vbn. When V1-V2 is equal to -2 V.sub.REF +2 Vr, the voltage Vbp becomes equal to Vbn. Therefore, the comparator 908b outputs a low level signal when V1-V2 is smaller than -2 V.sub.REF +2 Vr, while it outputs a high level signal when V1-V2 is larger than -2 V.sub.REF +2 Vr.
In the same manner, each time a difference V1-V2 between the input voltages V1 and V2 is increased by 2 Vr, the number of the comparators to output a high level signal is increased one by one starting from 908a toward 908f shown in FIG. 17. Change of the output signals of the comparators 908a to 908f is shown in the following table 1.
TABLE 1 ______________________________________ Analog Input Comparator Output V1-V2 908a 908b . . . 908c 908d . . . 908e 908f ______________________________________ .about.-2V.sub.REF L L L L L L -2V.sub.REF H L L L L L .about.-2V.sub.REF + 2Vr -2V.sub.REF + H H L L L L 2Vr .about.-2V.sub.REF + 4Vr . . . -2Vr H H L L L L .about.0 0 H H H H L L .about.2Vr . . . 2V.sub.REF - 4Vr H H H H L L .about.2V.sub.REF - 2Vr 2V.sub.REF - 2Vr H H H H H L .about.2V.sub.REF 2V.sub.REF .about. H H H H H H ______________________________________
As is seen from Table 1, every time the difference V1-V2 of input voltages is increased by 2 Vr, an increased number of comparators output a high level signal, starting from the left hand side toward the right hand side of table 1. In other words, the comparators 908a to 908f output signals called "thermometer code". The encoder 4 receives thermometer codes from the comparators 908a to 908f to output digital signals D1 to Dm.
As is seen from FIG. 17, each of the comparators 908a to 908f receives corresponding positive input voltage and negative input voltage through the ladder resistor circuit 901. In other words, complementary or differential analog input signals V1 and V2 to be converted are applied to each of the comparators 908a to 908f through the ladder resistor circuit 901. The corresponding positive input terminal and negative input terminal of each of the comparators 908a to 908f have parasitic capacitance with respect to ground. A change of the applied positive input voltage and negative input voltage is delayed according to a time constant determined by the parasitic capacitance and the resistance Rr of the ladder resistor circuit 901. In other words, a change of the input voltage applied to each comparator is delayed to reduce a conversion speed of the A/D converter 900.